1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing it, and more particularly to a semiconductor device provided with a capacitor having a large capacitance in a form that the surface area of an opening where a capacitor electrode is formed is increased, and a method of manufacturing such a semiconductor device.
2. Description of the Related Art
The semiconductor device having a capacitor such as DRAM has a problem that a capacity of the capacitor decreases with development of downsizing of an element. In recent years, in order to solve this problem, various capacitors have been proposed. One of them is a cylindrical capacitor. FIGS. 29A and 29B are a sectional view and a plan view each showing a part of a conventional semiconductor device having the cylindrical capacitor.
Referring to FIG. 29, a gate wiring(s) 103 is formed on a semiconductor substrate 101 through a gate insulating film not shown. On the upper surface and side surface of the gate wiring 103, a silicon oxide film 105 and a nitride film side wall 107 are formed, respectively. Further, on the oxide film 105, a nitride film 109 is formed as an etching stopper film. On the gate wiring 103, an insulating film 111 having an opening(s) 113 which reaches the semiconductor substrate 101 is formed through these insulating film. The openings 113 are filled with conductive layers 115 and 116 which are electrically connected to the semiconductor substrate 101.
On the insulating film 111, an interlayer insulating film 121 including a bit wiring 125 is formed. In the interlayer insulating film 121, an opening(s) 123 communicating with the openings 113 is formed. The opening 123 is filled with a bit wiring 125 which is connected to the semiconductor substrate 101 through the conductive layer 115. An opening 135 is formed to passe through between the bit wirings 125 and to communicate with the opening 113. The opening 135 is filled with a conductive layer 137 which is connected with the semiconductor substrate 101 through the conductive layer 116.
On the interlayer insulating film 121, an interlayer insulating film 139 having a cylindrical opening 143 communicating with the opening 135 is formed. Within the opening 143, a cylindrical capacitor 159 is formed along inner wall of the cylindrical opening 143. The cylindrical capacitor 159 includes a capacitor lower electrode 152, a capacitor dielectric film 154 and a capacitor upper electrode 156. The capacitor 159 is electrically connected to the semiconductor substrate 101 through the conductive layer 137 and the conductive layer 116.
Referring to sectional views showing a manufacturing process in FIGS. 30 to 38, an explanation will be given of a method of manufacturing the semiconductor device described above.
First, referring to FIG. 30, on a semiconductor substrate 101, gate wirings 103 each covered with an oxide film 105 as a hard mask is formed. A side wall film 107 made of a nitride film is formed on a side surfaces of the gate wirings 103. On the gate wirings 103, an etching stopper 109 made of a nitride film and an insulating film 111 made of an oxide film are formed successively.
Referring to FIG. 31, using a resist film 113 as a mask, the insulating film 111 and etching stopper 109 are etched to expose the semiconductor substrate 101 so that openings 113 are formed.
In this case, owing to this etching, a modified layer is formed on the surface of the semiconductor substrate 101. This modified layer is removed by dry etching.
Referring to FIG. 32, a conductive layer 115 is formed within each of the openings 113 by etch-back technique or CMP (Chemical Mechanical Polishing) technique.
Referring to FIG. 33, an insulating film 118 made of an oxide film is formed on the insulating film 111. On the insulating film 118, a resist film 173 having a desired pattern is formed. Thereafter, using the resist film 173 as a mask, the insulating film 118 is etched to make an opening 123 which reaches the conductive layer 115.
In this case, since a modified layer due to the dry etching is formed on a surface of the conductive layer 115 within the opening 123, this modified layer is removed by dry etching.
Referring to FIG. 34, a bit wiring 125 is formed on the insulating film 118 so as to be embedded in the opening 123.
Referring to FIG. 35, an insulating film 120 made of an oxide film is formed on the bit wiring 125. A resist film 183 having a desired pattern is formed on the insulating film 120. Thereafter, using the resist film 183 as a mask, an interlayer insulating film 121 including the insulating films 120 and 118 is etched to form an opening 135 which reaches the conductive layer 116. In this case, since the modified layer due to the etching is formed on a surface of the conductive layer 116, the modified layer is removed by the dry etching.
Referring to FIG. 36, a conductive layer 137 is formed within the opening 135 by the etch-back technique or CMP technique.
Referring to FIG. 37, an interlayer insulating film 139 is formed on the interlayer insulating film 121. Further, a resist film 177 having a desired pattern is formed on the interlayer insulating film 139. Thereafter, using the resist film 177 as a mask, the interlayer insulating film 139 is etched to form a cylindrical opening 143 which reaches the conductive layer 137. In this case, since the modified layer due to the etching is formed on a surface of the conductive layer 137, the modified layer is removed by the dry etching.
Referring to FIG. 38, a polysilicon film 151, oxide/nitride film 153 and polysilicon film 155 are formed on the interlayer insulating film 139 and along the inner wall of the cylindrical opening 143.
Finally, referring to FIG. 29 again, the polysilicon film 151, oxide/nitride film 153 and polysilicon film 155 which are located on the insulating film 139 are removed by the etch-back technique or CMP technique. Thus, a capacitor 159 which comprises the capacitor lower electrode 152, capacitor dielectric film 154 and a capacitor upper electrode 156 is formed to complete a semiconductor device.
However, in the above described conventional technique, when downsizing further proceeds, the cylindrical opening may be deepened in order to assure a necessary capacitance. This makes it very difficult to form the cylindrical opening. In addition, it is difficult to remove completely the modified layer produced due to etching to form the opening. The residue provides an increased contact resistance which leads to reduction of a response speed of the device.
The present invention has been accomplished to solve the problems described above.
A first object of the invention is to provide a semiconductor device which can increase the area of a capacitor electrode without greatly changing a conventional structure, thereby assuring sufficient capacitance of a capacitor.
A second object of the invention is to provide a semiconductor device which reduces the resistance between a capacitor electrode and a semiconductor substrate and have great reliability in electricity.
A third object of the invention is to provide a method of manufacturing the above described semiconductor device.
The semiconductor device having a capacitor, comprises:
a semiconductor substrate;
a plurality of insulating layers formed on the semiconductor substrate;
a plurality of openings formed in each of the insulating layer so as to communicate with one another, the openings having different diameters at least at each of coupling portions;
a conductive layer formed partially or substantially entirely in the opening in a lowermost layer of the multi-layer insulating layers in contact with the semiconductor substrate, and the conductive layer electrically connected to the semiconductor substrate;
a capacitor lower electrode formed to extend on the conductive layer and along the surfaces of the openings formed in each of the insulating layer; and
a capacitor upper electrode formed on the capacitor lower electrode through a capacitor insulating film.
The semiconductor device having a capacitor, comprises:
a semiconductor substrate;
a first insulating layer formed on the semiconductor substrate, including a first wiring and having a first opening which reaches the semiconductor substrate;
a second insulating layer formed on the first insulating layer, including a second wiring and having a second opening which communicates with the first opening;
a third insulating layer formed on the second insulating layer, and having a third opening which communicates with the second opening;
a capacitor lower electrode formed on a surface of the first, second, and third openings; and
a capacitor upper electrode formed on the capacitor lower electrode through a capacitor dielectric film,
wherein the openings have different diameters from each other at least at each of their coupling portions, respectively.
The capacitor lower electrode is electrically connected to the semiconductor substrate through a conductive layer formed partially or substantially entirely in the first opening.
The first opening comprises the first insulating film and an etching stopper film formed on a surface of the first wiring.
The second opening comprises the second insulating film and an etching stopper film formed on a surface of the second wiring.
The method of manufacturing a semiconductor device having a capacitor, comprises the steps of:
forming, on a semiconductor substrate, a first insulating layer including a first wiring and having a first opening which reaches the semiconductor substrate;
forming, in the first opening, a first conductive layer electrically connected to the semiconductor substrate;
forming, on the first insulating layer, a second insulating layer including a second wiring;
forming, in the second insulating layer, a second opening communicating with the first opening and having a diameter different from that of the first opening at their coupling portion;
forming, in the second opening, a second conductive layer electrically connected to the first conductive layer;
forming a third insulating layer formed on the second insulating layer;
forming, in the third insulating layer, a third opening communicating with the second opening and having a diameter different from that of the second opening at their coupling portion;
removing at least the second conductive layer through the third opening;
forming, on a surface of the first, second, and third openings, a capacitor lower electrode electrically connected to the semiconductor substrate; and
forming, on the capacitor lower electrode, a capacitor upper electrode through a capacitor dielectric film.
In the step of forming the second conductive layer, the second conductive layer is formed to extend onto the second insulating layer.
In the step of removing the second conductive layer, a part of the first conductive layer is removed, and the capacitor lower electrode is electrically connected to the semiconductor substrate through the first conductive layer.
The method of the manufacturing the semiconductor device having a capacitor, further comprises the steps of forming the first opening in a self-aligned manner using an etching stopper film formed on the first wiring.
The method of the manufacturing the semiconductor device having a capacitor, further comprises the steps of the second opening in a self-aligned manner using an etching stopper film formed on the second wiring.